Compiler and Architecture Support for NVM Crash Consistency

DISI Seminars
7 November 2022
Start time 
10:00 am
Polo Ferrari 1 - Via Sommarive 5, Povo (Trento)
Room Garda, floor +1
Department of Information Engineering and Computer Science
Target audience: 
University community
Contact person: 
Kasim Sinan Yildirim
Changhee Jung (Purdue University)


In this talk, I'll present two hardware/software co-design approaches to nonvolatile memory (NVM) crash consistency, i.e., ReplayCache and PMEM-Spec. ReplayCache enables volatile cache for single-core nonvolatile processors of batteryless energy-harvesting systems where NVM serves as the main memory.
On the other hand, PMEM-Spec targets multi-core general-purpose processors with deep cache hierarchy and a hybrid of DRAM and NVM.
I will demonstrate how computer architecture and compiler can work together to guarantee NVM crash consistency in a cost-effective way.

Keywords: Compilers, Computer architecture, Nonvolatile Memory

About the speaker

Changhee Jung is an Associate Professor of Computer Science at Purdue University. He received his Ph.D. degree in Computer Science from Georgia Tech in 2013. His research interests are in compilers and computer architecture, with an emphasis on performance, reliability, and security. His work has appeared in top conferences such as MICRO, PLDI, ASPLOS, SC, and USENIX Security. He received the NSF Career Award, AMD/Google Faculty Research Awards, and the Silver Prize in the SAMSUNG HumanTech Thesis Competition. Recently, he was inducted into MICRO